IDN 32 (S-0-0032) Primary Operation Mode
Defines the drive's operational mode when the AT status word bits 8 and 9 are both 0.
The master requests a particular operation mode through the MDT control word (bits 8 and 9). The master can switch between the operation modes defined within this IDN and the mode defined within the secondary operation mode 1 ( IDN 33 ) with these bits in real time. Switch into position control during fast moving, could result a jerk.
The following table may be used to define the primary operation mode. All reserved bits are not supported and must be zero. When the drive powers-up the operational mode is undefined, and the master must define a primary operational mode in CP3. The gain for bit 3 is defined by IDN 296 , Velocity Feed Forward Gain. It is not possible to select position control with motor feedback in IDN 32 and position control using external feedback in IDN 33 , also the reverse setting of this IDNs is not possible and will be checked by the drive (refer to IDN 117 ).
For position control with external feedback 2, all position data, e.g., also IDN 51 , are used for the external feedback.
Data Length: | 2 bytes | Non-Volatile: | No |
Data Type: | Binary | Write Access: | CP2, CP3 |
Minimum: |
| Run-Up Check: | CP3 |
Maximum: |
| Cyclic Transfer: |
|
Default: | 3 | Serial Equiv: |
|
Units: |
| Version: | |
IDN Type: | PS:VE:CT | ADS Index Group (hex.): | 0x0020 |
Definition:
Bit | Value | Description |
|---|---|---|
3 – 0 | 0000 | Reserved: No mode of operation. |
| 0001 | Torque control |
| 0010 | Velocity control |
| x011 | Position control using motor feedback. |
| x100 | Position control using external feedback. |
| x101 | Reserved: Position control using motor and external feedback. |
3 | 0 | Position control with following error. |
| 1 | Position control without following error ( IDN 296 ). |
4 – 13 | 0 | Reserved. |
14 | 0 | Command values are issued as cyclic data. |
| 1 | Reserved: Command values are issued through service channel. |
15 | 0 | Bits 0-14 are as defined above. |
| 1 | Reserved: Bits 0-14 are defined by the manufacturer. |