Control and status byte 0 in process data mode
Control byte 0 in process data mode
Control byte 0 (CB0) is in the output image and is transferred from the controller to the power terminal.
Bit | CB0.7 | CB0.6 | CB0.5 | CB0.4 | CB0.3 | CB0.2 | CB0.1 | CB0.0 |
Name | RegAccess | R/W | DR no. | |||||
Key
Bit | Name | Description | |
|---|---|---|---|
CB0.7 | RegAccess | 0bin | Register communication off (process data mode) |
CB0.6 | R/W | 0bin | Read access |
(1bin) | Because the KL8001 data registers can only be read, write access is not useful. | ||
CB0.5 to CB0.0 | DR no. | Data register number: | |
Status byte 0 in process data mode
Status byte 0 (SB0) is located in the power terminal's input image, and is transmitted from the power terminal to the controller.
Bit | SB0.7 | SB0.6 | SB0.5 | SB0.4 | SB0.3 | SB0.2 | SB0.1 | SB0.0 |
Name | RegAccess | ES Error Info | DR no. | |||||
Key
Bit | Name | Description | |
|---|---|---|---|
SB0.7 | RegAccess | 0bin | Acknowledgement for process data access |
SB0.6 | ES Error Info | 1bin | The lowest nibble (ES.3 to ES.0) in the extended status byte contains error information. Evaluate the extended status byte! |
SB0.5 to SB0.0 | DR no. | The number of the data register that is to be read. | |