IP/IE5109 Mapping
Evaluation in Intel format
Default mapping for CANopen, DeviceNet, Modbus, RS232 and RS485
|
Address |
Input data |
Output data | ||
---|---|---|---|---|---|
Conditions |
Word offset |
High byte |
Low byte |
High byte |
Low byte |
Complete evaluation: don't care |
0 |
D0 |
SB |
Reg0 |
CB |
1 |
D2 |
D1 |
reserved |
Reg1 | |
2 |
D4 |
D3 |
reserved |
reserved |
Evaluation in Motorola format
Default mapping for PROFIBUS and Interbus
|
Address |
Input data |
Output data | ||
---|---|---|---|---|---|
Conditions |
Word offset |
High byte |
Low byte |
High byte |
Low byte |
Complete evaluation: don't care |
0 |
D1 |
SB |
Reg1 |
CB |
1 |
D2 |
D0 |
reserved |
Reg0 | |
2 |
D3 |
D4 |
reserved |
reserved |
Evaluation in Intel format with word alignment
Default mapping for Lightbus, Ethernet and Controller Box (IL230x-Cxxx)
|
Address |
Input data |
Output data | ||
---|---|---|---|---|---|
Conditions |
Word offset |
High byte |
Low byte |
High byte |
Low byte |
Complete evaluation: don't care |
0 |
reserved |
SB |
reserved |
CB |
1 |
D1 |
D0 |
Reg1 |
Reg0 | |
2 |
reserved |
D2 |
reserved |
reserved | |
3 |
D4 |
D3 |
reserved |
reserved |
|
Address |
Input data |
Output data | ||
---|---|---|---|---|---|
Conditions |
Word offset |
High byte |
Low byte |
High byte |
Low byte |
Complete evaluation: don't care |
0 |
reserved |
SB |
reserved |
CB |
1 |
D0 |
D1 |
Reg0 |
Reg1 | |
2 |
reserved |
D2 |
reserved |
reserved | |
3 |
D3 |
D4 |
reserved |
reserved |
Key
Complete evaluation: Additionally to the process data the
control and status bytes are showed in the address area
Motorola format: Motorola or Intel format can be set.
Word alignment: in order that the address area of each channel
starts always on a word boundary, dummy bytes are added to the
process image
SB: Status Byte (appears in the process image of the
inputs)
CB: Control Byte (appears in the process image of the outputs)
D0: lower significant byte of the Counter word
(read/write)
D1: higher significant byte of the Counter word (read/write)
D2: the status of A, B, C (latch), gate and latch input
D3: lower significant byte of the Latch word (read) / lower byte of
period length
D4: higher significant byte of the Latch word (read) / higher byte
of period length
Reg0: lower significant byte for register communication
Reg1: higher significant byte for register communication
reserved: Although this byte occupies space in the process data
memory, it has no function
"-": This byte is not used or occupied by the
Fieldbus Box.