EtherCAT Distributed Clocks - default settings

General

The distributed clock technology in the EtherCAT system enables synchronized operation of local clocks in all EtherCAT devices (master and slaves). If an EtherCAT slave supports distributed clocks (DC), its ESC (EtherCAT slave controller) contains a hardware-based clock (usually 64 bit, in rarer cases 32 bit) with a resolution of 1 bit = 1 ns. These local clocks can be used for synchronous outputs or data acquisition (e.g. of analog value inputs). An EtherCAT slave may support DC, but does not have to. Mixed operation in the EtherCAT system is possible, so long as the EtherCAT master supports DC.

One device is the reference clock, all other DC-capable devices are continuously synchronized with an accuracy of generally less than 100 ns. The synchronization process and the method of communication of EtherCAT dictate that the first DC-capable slave in the system represents the reference clock ("M" in Fig. Topology of the EtherCAT system with DC-capable devices). Via a special telegram the subsequent slaves cyclically receive information about the state of the reference clock and readjust themselves based on this time.

Data from the readjustment process provide important diagnostic information about the state of the distributed clock system.

The TwinCAT EtherCAT master deals with the basic topology-dependent calculations, the adjustment during EtherCAT startup and the continuous synchronization. The corresponding settings are specified in the System Manager configurator dialogs.

Additional notes and more detailed information about the distributed clocks system can be found in the respective sections.

Distributed clocks in operation The distributed clock system is synchronized when EtherCAT starts up during the transition from PREOP to OP. The slaves are set to OP state. In DC-capable slaves proper synchronization in OP state is usually important. Otherwise the slaves automatically return to PREOP state. TwinCAT 2.11 can synchronize such devices and switch them to OP.

Default settings for the EtherCAT master

Effectiveness of modifications The distributed clock system is analyzed and calculated when EtherCAT starts up. Changes in the settings of this system therefore always require activation of the modified configuration and an EtherCAT restart.

By default the distributed clocks system (DC) is calculated such that the usual I/O configurations can run in a stable manner. Nevertheless, it may be advisable to adjust the settings during machine commissioning using the diagnostic tools provided.

By default is “Automatic DC mode selection” is active. “DC in use” should only be selected for explicit modifications of the automatic configuration.

Reference Clock selection

Manual selection of the reference clock for this EtherCAT system is only required in exceptional circumstances and should be done with caution. TwinCAT generally selects the correct DC-supporting slave, i.e. the first one.

If a different slave is selected manually

• this one must either support DC explicitly (DC tab is shown in the slave):



• or must be manually marked with

in the advanced slave settings.

Potential reference clock If a slave without the required hardware support is marked as “potential Reference Clock”, the EtherCAT system has no reference clock after startup. The slaves will not switch to OP state and report PREOP_ERR. From version 2.11R2 build 2032, TwinCAT checks during each startup whether the selected reference clock also supports this function. The following logger message appears: "slave xx is reference clock device, but does not support dc!" (see Fig. "Event logger message: no support by reference clock") In logger window TwinCAT 2.11R2 (from build 2028) will issue a message “DC not synchronized”, if a slave cannot be switched from PREOP to OP state because it is not synchronized. (see Fig. "Event logger message: no synchronization")

Default settings for EtherCAT slaves

The distributed clocks settings can be found in the advanced settings of the EtherCAT slave.

If the slave is intended by the manufacturer for DC operation, it includes such an operation mode; see Fig. Default slave setting – slave with and without DC capability below. Selection of this operation mode activates the integration of the slave into the synchronization mechanism on the master side.

Distributed clock activation If the settings “Enable” and “Use as potential Reference Clock” are activated for devices that do not support this functionality, the system may malfunction. The function must be enabled by the device manufacturer.

Slave shift time settings As in the master settings for all slaves, the SYNC times can be offset separately in the individual DC slaves. Not the general instructions.

Checking for DC support

EtherCAT slaves with DC function are

• loaded with the DC configuration during the transition from SAFEOP to PREOP.
• synchronized during the transition from SAFEOP to OP.

If problems occur in the individual phases as a result of incorrect configuration, the target states are not reached and the logger window of the System Manager shows associated information (e.g. “DC invalid sync cfg”)

To check whether and to what extent a device supports distributed clocks, the local clock registers can be displayed online. In the online display call up the Properties dialog by right-clicking in the free space.

In this case select the 4 registers 0x0910 to 0x0916. The local DC clock runs in these 2-byte registers. Like certain other slave registers, the System Manager can read these cyclically online.

The register values are displayed and automatically updated by the System Manager.

The following can be seen in Fig. Display of DC register values

• slaves with 64-bit DC support (highlighted in green here)
• slaves without DC support (highlighted in red here)
• slaves with 32-bit DC support (highlighted in yellow here)
  32 bits cover approx. 4.2 seconds. This is adequate for synchronization of the DC system. Information for working with 32/64 bit times in the PLC can be found in the corresponding section.

Up-to-dateness of the online display The System Manager reads and displays the values without claim of real-time and consistency. They have informative character and can provide an initial overview. The reading process takes up capacity in the acyclic EtherCAT communication, potentially at the expense of other applications Not all slave ESC register values can be read by the System Manager/EtherCAT master.