Control and status byte
Control byte
The control byte (CB) is located in the output process image, and is transmitted from the controller to the terminal.
Bit | CB.7 | CB.6 | CB.5 | CB.4 | CB.3 | CB.2 | CB.1 | CB.0 |
Name | - | - | - | - | EN_LATCH_EXTN | CNT_SET | EN_LATCH_EXTP | EN_LATC |
Legend
Bit | Name | Description | |
|---|---|---|---|
CB.3 | EN_LATCH_EXTN | 1bin | After the EN_LATCH_EXTN bit becomes active, the counter value is stored in the latch input (index 0x6000:03) upon the first external latch pulse with a falling edge. The subsequent pulses have no influence on the latch value. Please note: A new counter value can be written to the latch input only after the “Latch°valid” bit (LAT_EXT_VAL) in the status byte has a low-level. |
CB.2 | CNT_SET | rise | The counter is set with rising edge of CNT_SET to the value specified via the process data (index 0x7000:02). |
CB.1 | EN_LATCH_EXTP | 1bin | Once the EN_LATCH_EXTP bit is set, the counter value is stored in the latch input (index 0x6000:03) on the rising edge of the first external latch pulse. The subsequent pulses have no influence on the latch value. Please note: A new counter value can be written to the latch input only after the “Latch°valid” bit (LAT_EXT_VAL) in the status byte has a low-level. |
CB.0 | EN_LATC | 1bin | The zero point latch (C input) is activated. The counter value is saved upon the first external latch pulse after the EN_LATC bit becomes valid (this takes precedence over EN_LAT_EXTN/EN_LAT_EXTP). If the bit is set, subsequent pulses have no influence on the latch value. Please note: Only when the “Latch°valid” bit (LATC_VAL) in the status byte is at a low-level can a new counter value be written to the latch input (the LATC_VAL bit (SB.0) is not cleared by the terminal until the C pulse = LOW). |
Status byte
The status byte (SB) is located in the input process image, and is transmitted from terminal to the controller.
Bit | SB.7 | SB.6 | SB.5 | SB.4 | SB.3 | SB.2 | SB.1 | SB.0 |
Name | - | - | STATUS_INPUT | OVERFLOW | UNDERFLOW | CNTSET_ACC | LAT_EXT_VAL | LATC_VAL |
Legend
Bit | Name | Description | |
|---|---|---|---|
SB.5 | STATUS_INPUT | 0bin/ 1bin | Indicates the status of INPUT 1 |
SB.4 | OVERFLOW | 1bin | This bit is set if the 16-bit counter overflows (65535 to 0). It is reset when the counter exceeds one third of its measuring range (21845 to 21846) or immediately an underflow occurs. |
SB.3 | UNDERFLOW | 1bin | This bit is set if the 16-bit counter underflows (0 to 65535). It is reset when the counter drops below two thirds of its measuring range (43690 to 43689) or immediately an overflow occurs. |
SB.2 | CNTSET_ACC | 1bin | The data for setting the counter (index 0x7000:02) is accepted from the terminal. |
SB.1 | LAT_EXT_VAL | 1bin | An external latch pulse has occurred. The data with index 0x6000:03 match the latched value when the bit is set. To reactivate the latch input EN_LAT_EXTN or EN_LATCH_EXTP (CB.3 or CB.1) has first to be cleared and then to be set once more. |
SB.0 | LATC_VAL | 1bin | A zero point latch has occurred. The data with index 0x6000:03 match the latched value when the bit is set. In order to reactivate the latch input, it is necessary for EN_LATC (CB.0) first be cleared and then to be set once more. |