Gate/Latch combination input

In 2-channel mode 2xAB, there is one external gate/latch combination input available for each channel, designed for 24 V DC signals with a minimum pulse duration of t_ON > 1 µs. This can be used as follows:

Set counter value: set the counter value to a specified value using a positive or negative edge (output process data “Set counter on latch extern on positive/negative edge”)
Reset counter value: reset the counter value to the value set in index 0x80n1:1B “Reset counter value” (default setting: zero) (index 0x80n0:02 “Enable extern reset”)
Save counter value: save the counter value in separate process data via a positive or negative edge (output process data “Enable latch extern on positive/negative edge”)
Lock counter value: lock the counter value via a positive or negative edge (index 0x80n0:04 “Gate polarity” = “Enable pos./neg. gate”)

	Simultaneous use of gate and latch in 2-channel mode 2xAB When using the index 0x80n0:04 “Gate polarity” (1 = “Enable pos. gate”) and simultaneously activating the bit in the output process data “Enable latch extern on positive edge” (0x70n0:02), a positive edge at the gate/latch combination input causes the current counter value to be initially stored in the input process data “Latch value” (0x60n0:12). After that, the counter value is locked. The same applies to the use of index 0x80n0:04 “Gate polarity” (2 = “Enable neg. gate”) and the simultaneous activation of the bit in the output process data “Enable latch extern on negative edge” (0x70n0:04) upon a negative edge at the gate input/latch combination input.

Setting the counter value via the gate/latch combination input (Set counter on latch extern on positive/negative edge)

The counter value can be set to a preset value during runtime via the process data by the positive or negative edge at the gate/latch combination input.

Setting the counter value via the output process data “Set counter value” (0x70n0:11)
Activation of the counter value setting via

the positive edge at the external gate/latch combination input:
output process data “Set counter on latch extern on positive edge” (0x70n0:0A)
the negative edge at the external gate/latch combination input:
output process data “Set counter on latch extern on negative edge” (0x70n0:0B)

If the bit (TRUE) is set in the output process data “Set counter on latch extern on positive/negative edge” (0x70n0:0A/0B), the next positive or negative edge at the gate input/latch combination input sets the counter value in the input process data “Counter value” to the specified counter value in the output process data “Set counter value”.
To confirm, the bit in the input process data “Set counter done” (0x60n0:03) is set to TRUE.
The counter value setting can only be reactivated once the bit in the output process data “Set counter on latch extern on positive/negative edge” (0x70n0:0A/0B) has been set to FALSE.

Reset counter value via gate/latch combination input (Enable extern reset)

The counter value can be set to zero via the external gate/latch combination input.

Presetting of the reset value via index 0x80n1:1B “Reset counter value”, (Default: 0)
To activate this function set the bit in index 0x80n0:02 “Enable extern reset”.
Index 0x80n0:10 “Extern reset polarity” can be used to specify at which edge the gate/latch combination input is active.

0: “Fall” - the counter is set to zero with a falling edge
1: “Rise” - the counter is set to zero with a rising edge

There is no status message via the process data.

Saving the counter value via a positive/negative edge at the gate/latch combination input (Enable latch extern on positive/negative edge)

Save the counter value at the external gate/latch combination input via:

Output process data “Enable latch extern on positive edge” (0x70n0:02) = TRUE
At the first external latch pulse with positive edge, the current counter value is stored in the input process data “Latch value” 0x60n0:12.
Output process data “Enable latch extern on negative edge” (0x70n0:04) = TRUE
At the first external latch pulse with negative edge the current counter value is stored in the input process data “Latch value” (0x60n0:12).
Simultaneous activation of the output process data “Enable latch extern on positive/negative edge” (0x70n0:02/04)
The current counter value is saved in the input process data “Latch value” (0x60n0:12) with the first external latch pulse, regardless of the polarity of the edge.

Specification whether it is necessary to reactivate the command to save the counter value via:

“Enable continuous latch extern” Index 0x80n0:22 = FALSE
The following pulses at the gate/latch combination input have no effect on the latch value in the process data “Latch value” (0x60n0:12) when the bit in the output process data “Enable latch extern on positive edge” (0x70n0:02) or “Enable latch extern on negative edge” (0x70n0:04) is set.
Only when the bit in the input process data “Latch extern valid” (0x60n0:02) is FALSE can a new counter value be written to the gate/latch combination input in the process data “Latch value” (0x60n0:12).
“Enable continuous latch extern” Index 0x80n0:22 = TRUE
The counter value is written to process data “Latch value” (0x60n0:12) at every parameterized edge at the gate/latch combination input.
Reactivating the output process data “Enable latch extern on positive edge” (0x70n0:02) or “Enable latch extern on negative edge” (0x70n0:04) is no longer necessary.

Saving of the count value in the process data “Latch value” (0x60n0:12) is confirmed by the bit in the process data “Latch extern valid” (0x60n0:02).
The status of the gate/latch combination input can be recorded using the input process data “Status of input gate” (0x60n0:0C).

Lock counter value via a positive/negative edge at the gate/latch combination input (Enable pos./neg. gate)

The level at the gate/latch combination input at which the counter value is locked during runtime can be specified via index 0x80n0:04 “Gate polarity”.

0: Disable gate
The gate/latch combination input is disabled to lock the counter. It can still be used as external latch input for storage.
1: Enable pos. gate
The counter value is locked with HIGH level at the gate/latch combination input.
2: Enable neg. gate
The counter value is locked with LOW level at the gate/latch combination input

The current level at the gate/latch combination input is displayed via the input process data “Status of input gate” (0x60n0:0C).