Beckhoff FC7501/FC7502
The FC7501 respectively FC7502 are single-channel and double-channel SERCOS cards (SERCOS = SEriell Realtime COmmunication System) with PCI interfaces. They can be operated as SERCOS masters and/or as SERCOS slaves. The SERCON816 ASIC is used for these cards. It supports not only 2 and 4 Mbaud, but also 8 and 16 Mbaud. Now, neither the transmitter nor the receiver being used are specified for 16 Mbaud, which means that this property cannot yet be guaranteed.
Context menu
Append Box... <Insert>
Adds Sercos slaves (boxes). For an Overview of all currently supported SERCOS devices, please see...
Delete Device... <Del>
Removes the FC750x fieldbus card and all subsidiary elements from the I/O configuration.
Online Reset
Initiates an online reset of the Sercos master, so that the phase will switch to phase 0 and will then return to what had previously been the current phase.
"FC7500" tab
PCI Slot/Irq: Shows in which logical PCI slot the card was detected and which IRQ is assigned to it. The IRQ is unused.
Search...: Searches for all connected FC750x channels. Select those required. In the case of an FC7502 both channels A and B appear. These behave in logical terms like two FC7501 cards.
PCI-Cfg...: In which the address of the FC750x is set in the lower memory area (below 1 MB) of the PC.
Scan the bus...: The Sercos ring is scanned here, and all devices found are added to the device. The configuration of Beckhoff boxes is read precisely.
Data rate: The Sercos baud rate is set here. 2 Mbaud, 4 Mbaud, 8 Mbaud or 16 Mbaud can be selected.
Transmitter power: The power of the transmitter is set here, depending on the length of optical fibre being used.
Operating mode: The FC750x can be operated as a Sercos master and as a Sercos slave. In either of these operating modes, the card can be operated as the synchronous master (the PC and other synchronous devices receive their clock from the sync master) or as a sync slave (the card, or the card channel, receive the synchronisation signal from the other channel or from another card over the ribbon cable). There can only be one synchronous master within one PC. If both the channels of a FC7502 are used, then only the A-channel (the channel closest to the motherboard) can be used as the sync master.
Start-up to Phase 4: If selected, then every time TwinCAT starts an attempt will be made to bring the Sercos bus into phase 4, and thus to perform cyclical data exchange. If this option is not selected, the card will remain in phase 2. It will then have to be placed into phase 4 at a later stage by ADS from, for example, the PLC.
Check Timing: If selected, then in each cycle the exact real-time behaviour of access to the card is monitored. If not maintained (actual values are read too early, or set values are written too late) then a corresponding counter located in the process data is incremented. This monitoring has only a very small impact on the performance, so that there is no disadvantage to using it in normal applications. In applications with very short cycle times and where performance margins are very tight, however, it can be switched off.
Watchdog: The SERCON816 Sercos ASIC used has a hardware watchdog that monitors regular PC access, activating phase 0 if the accesses cease. The number of cycles that the watchdog will tolerate is given here. The watchdog is deactivated if the figure supplied is 0.
NC Access Time: A figure is given here for the time required by the NC in each cycle for reading the actual values and writing the set values. This value is only used by the internal time slot calculation, so that possible time slot problems can be seen in advance (cf. Check Timing Errors).
NC Shift Time: The NC shift time can be used to delay the time at which the NC begins to read the actual values. The value gives the number of µs after the last AT. The default value of 50µs ensures in normal cases that even if there is a small amount of jitter in the real-time system, the ATs, and therefore the actual values, have safely arrived at the master before the NC acts. If more than one Sercos ring is in use, it may be necessary to adjust this value, since the NC accesses all the rings at the same time, but the connected devices in particular rings mean that the last ATs arrive at different times. Since the Sercos rings on the bus are synchronized in hardware, the following rule applies: The NC shift time should be set on the various rings in such a way that the resulting tNcAccess time (see timing) is about the same on all the rings. In addition to this, the NC shift time should not be much less than about 20 µs on any ring.
Cycle-Time(3-4): The cycle time of the highest priority associated task is indicated here. This is used in phases 3 and 4.
Cycle-Time(0-2): The cycle time in phases 0 to 2 is given here. This is used for the bus start-up.
The following values make it possible to influence the internal time slot calculation, to make modifications of a few µs in the event of communication problems or loading difficulties. However, this should not be done without the appropriate Sercos expertise, so that the effects can be estimated.
JT1 User: The value set here alters the jitter JT1 used in the internal time slot calculation.
JT2 User: The value set here alters the jitter JT2 used in the internal time slot calculation.
JTSCyc User: The value set here alters the jitter JTSCyc used in the internal time slot calculation.
T3 User: The value set here alters the time T3 used in the internal time slot calculation.
T4 User: The value set here alters the time T4 used in the internal time slot calculation.
"Timing (Online/Offline)" tab
The Timing tab provides internal details of the time slot calculation. A distinction is made between and online and an offline mode since parameters are also read from the devices and included in the calculation of the time slot. In offline mode (TwinCAT is stopped) default values are used for the timing values that are normally read from the devices, so that the result of this calculation can differ slightly from that obtained with the true values. The offline calculation does however as a rule provide a very good estimate of the bus timing. In online mode (TwinCAT is running and the Sercos Bus is in phase 3 or 4) the exact values are displayed and provide the expert user with very precise information about the timing on the bus.
The diagram in the lower section provides a good summary of the bus loading being generated, and over the capacity still available. A Sercos cycle is displayed between the two red master control telegrams (MST). After the MST the devices first send their drive telegrams (green), and after the NC shift time the NC access time (dotted region) starts, in which the NC accepts the actual values and transmits new set values. The subsequent clear region leading up to the Master Data Telegram (MDT, blue) indicates bus capacity that is still free, and can be used for other devices or for additional data associated with the existing devices.
Not long after the MDT the master sends another MST, so starting the next cycle. Times T3 and T4 indicate when the devices should all simultaneously accept the set values or acquire the actual values.
"Online" tab
The Online tab makes it possible to find the current phase of the Sercos ring and to change it. Three red dashes "---" for the phase indicate a ring that is not closed. A phase indication like "2->3" indicates that a change of phase is currently in progress, and that it is possible that this may take some time.
Tab ”(Online) DPRAM”
See ”Online Display of DPRAM” . The registers in the ASIC can be seen starting at address 0x1000 following the DPRAM of the SERCON816 without a break.
Input Diagnosis
The FC750x has a variety of diagnostic variables available automatically. They describe the state of the card and of the Sercos ring:
ActualPhase: The current phase of the Sercos ring is displayed.
RequestedPhase: The phase currently being requested (e.g. by the PLC) is displayed. The card or driver is presently attempting to activate this phase.
SystemState: Gives more precise information about the current phase:
0xE001 = Phase 0
0xE002 = Phase 1
0xE003 = Phase 2
0xE004 = Phase 3
0xE005 = Phase 4
0xE008 = Break
0xE011 = Phase switch 0 -> 1
0xE012 = Phase switch 1 -> 2
0xE013 = Phase switch 2 -> 3
0xE014 = Phase switch 3 -> 4
SystemError: Indicates the current error state:
0x0000 = No error
0x8005 = Drive addresses are incorrect
0x8006 = HS-timeout (service channel)
0x8007 = Double AT-failure
& 0x8009 = LWL-bus is interrupted
0xD002 = Switch from 2->3 failure (S-0-0127)
0xD003 = Switch from 3->4 failure (S-0-0128)
0xD004 = Invalid Command
0xF001 = Configuration error (actual/nominal channel)
0xF002 = Error in the time slot calculation
0xF003 = Incorrect phase setting by the NC
0xF004 = Internal error
0xF005 = Error lifecounter
0xF008 = Double MDT-failure
0xF009 = Double MST-failure
0xF00A = Sync-In signal failure
TTimingErrorCnt1/b>: A counter that is incremented if the NC supplies new set values too late ("Check timing" must have been selected).
TimingErrorCnt2/b>:: A counter that is incremented if the NC accesses the actual values too early ("Check timing" must have been selected).
RDistErrorCnt/b>: An error counter that counts telegrams received in a damaged state (cf. RDIST in the SERCON816 Reference Manual). The cause can be an incorrect baud rate.
FibBrErrorCnt: An error counter that counts telegrams received in a damaged state (cf. FIBBR in the SERCON816 Reference Manual). The cause can be an incorrect baud rate.
RErrErrorCnt: An error counter that counts telegrams that have been lost or that are received at the wrong time (cf. RERR in the SERCON816 Reference Manual).
MstLateErrorCnt: An error counter that counts MSTs that are received too late (cf. MSTLATE in the SERCON816 Reference Manual).
MstEarlyErrorCnt: An error counter that counts MSTs that are received too early (cf. MSTEARLY in the SERCON816 Reference Manual).