FB_SimDelay

Delay block.

A binary input signal 'bIn' is issued for the time duration 't'. The delay must be shorter than the input pulse duration.

FB_SimDelay 1:

VAR_INPUT

VAR_INPUT
    bIn  : BOOL;  (* Input pulse *)
    t     : TIME; (* Delay time of the pulse *)
END_VAR

bIn: Input signal

t: Delay time (should be shorter than the pulse duration)

VAR_OUTPUT

VAR_OUTPUT
    Q     : BOOL; (* PULSE *)
END_VAR

Q: Output signal

Requirements

Development
Environment

Target System

PLC Libraries to include

TwinCAT v2.9.0 Build > 1020

PC (i386)

TcSimManager.Lib

(Standard.Lib; TcBase.Lib; TcSystem.Lib are included automatically)