Addresses

CAUTION

Shifting the contents of addresses by Online Change

If you use address pointers, address content may shift in the event of an Online Change!

	Automatic addressing It is recommended not to use direct addressing for allocated variables, but to use the * placeholder instead. If the placeholders * (%I, %Q or %M*) are used, TwinCAT automatically performs flexible and optimized addressing.

Syntax:

<identifier> AT <address> : <data type>;

If an address is specified, the position in the memory and the size are expressed via special strings. An address is marked with the percent sign %, then follows the memory area prefix, the optional size prefix and the memory position.

%<memory area prefix> ( <size prefix> )? <memory position>

<memory area prefix> : I | Q | M
<size prefix>        : X | B | W | D
<memory position>    : * | <number> ( .<number> )*

Memory area prefix

Input memory area for inputs

For physical inputs via input drivers ("sensors")

Output memory area for outputs

Physical outputs via output drivers ("actuators")

Flag memory area

Size prefix

X	Single bit
B	Byte (8 bits)
W	Word (16 bits)
D	Double word (32 bits)

Examples:

IbSensor1 AT%I*    : BOOL;
IbSensor2 AT%IX7.5 : BOOL;

	If you do not explicitly specify a single bit address, Boolean variables are allocated byte by byte. Example: a value change of bVar AT %QB0 concerns the area from QX0.0 bis QX0.7.

Examples

Variable declarations:

IbSensor AT%I* : BOOL;	In the address specification, the placeholder * is specified instead of the memory position. This enables TwinCAT to perform flexible and optimized addressing automatically.
InInput AT%IW0 : WORD;	Variable declaration with address specification of an input word
ObActuator AT%QB0 : BOOL;	Boolean variable declaration Note: for Boolean variable one byte is allocated internally if no single bit address is specified. A value change of ObActuator consequently affects the range from QX0.0 to QX0.7.
IbSensor AT%IX7.5 : BOOL;	Boolean variable declaration with explicit specification of a single bit address. Only input bit 7.5 is read during access.

Other addresses:

%QX7.5 %Q7.5	Single bit address of the output bit 7.5
%IW215	Word address of the input word 215
%QB7	Byte address of the output byte 7
%MD48	Address of a double word at memory location 48 in the flag area
%IW2.5.7.1	The interpretation depends on the current controller configuration (see below)

Possible memory area overlaps for direct addresses

In order to assign a valid address in a PLC project, you must know the desired position in the process image. For this, you first have to define the memory area and the required size. In selecting the memory position, the assignment of the different sizes in the memory as illustrated in the table below must be observed so that you can rule out memory area overlaps.

DWord	Word	Byte	Bit
D0	W0	B0	X0.0
		B1	X1.0
	W1	B2	X2.0
		B3	X3.0
D1	W2	B4	X4.0
		B5	X5.0
	W3	B6	X6.0
		B7	X7.0
D2	W4	B8	X8.0
…

Examples: memory area overlaps

1. W0 contains B0 and B1. If you place a Word variable at W0 and a Boolean variable at B1, the memory areas would overlap.

2. W3 contains B6 and B7. If you place a Word variable at W3 and a Boolean variable at B6, the memory areas would overlap.

See also:

Programming a PLC Project > Declaring variables > AT-Declaration