KL8524 - Register overview
The registers are used for the parameterization of the Bus Terminals and are available for each channel. They can be read or written by means of the register communication.
Register no. | Comment | Default value | R/W | Memory | |
|---|---|---|---|---|---|
R0 | reserved | - | - | - | - |
... | ... | ... | ... | ... | ... |
R6 | reserved | - | - | - | - |
Command register | 0x0000 | 0dec | R/W | RAM | |
Terminal type | 0x214C | 8524dec | R | ROM | |
Firmware version (ASCI) | e.g. 0x3141 | e.g. 12609dec | R | ROM | |
R10 | Multiplex shift register |
|
| R | ROM |
R11 | Signal channels |
|
| R | ROM |
minimum data length of a channel |
|
| R | ROM | |
R13 | Data structure |
|
| R | ROM |
R14 | reserved | - | - | - | - |
R15 | Alignment register |
|
| R/W | RAM |
Hardware version number | e.g. 0x0000 | e.g. 0dec | R/W | SEEPROM | |
R17 | reserved | - | - | - | - |
... | ... | ... | ... | ... | ... |
R30 | reserved | - | - | - | - |
Code word register | 0x0000 | 0dec | R/W | RAM | |
Enable PLC Set LED | 0x0000 | 0dec | R/W | SEEPROM | |
K-bus off reaction | 0x0000 | 0dec | R/W | SEEPROM | |
R34 | reserved | - | - | - | - |
... | reserved | - | - | - | - |
R36 | reserved | - | - | - | - |
Channel 1: output mode / switch-on delay | 0x0000 | 0dec | R/W | SEEPROM | |
Channel 2: output mode / switch-on delay | 0x0000 | 0dec | R/W | SEEPROM | |
Channel 3: output mode / switch-on delay | 0x0000 | 0dec | R/W | SEEPROM | |
Channel 4: output mode / switch-on delay | 0x0000 | 0dec | R/W | SEEPROM | |
R41 | reserved | - | - | - | - |
... | reserved | - | - | - | - |
R63 | reserved | - | - | - | - |