Data exchange, function

Control Byte for process data exchange

The control byte is transmitted from the terminal to the controller. It can be used in register mode (REG = 1) or in process data exchange (REG = 0) (see note in the annex). For setting up data exchange (handshake), the control and the status byte are used in process data exchange.

MSB

REG=0

OL2

OL1

OL0

0

IR

RA

TR

Status byte in process data mode

The status byte is transmitted from the terminal to the controller. It contains the data required for handshake.

MSB

REG=0

IL2

IL1

IL0

BUF_F

IA

RR

TA

TR/TA: TRANSMIT-REQUEST/TRANSMIT-ACCEPTED bits

The handshake for data transmission is provided via this bit. A change of state in TR causes the data set defined via OL0-OL2 (5 bytes maximum) to be loaded into the transmission FIFO. The terminal signals execution of this instruction via TA.

Example

Output
Control byte

Input
Status byte

Comment

00000000

0XXXX0X0

Start data transmission

00100001
Data Bytes: In D0 and D1
Register data

0XXXX0X0

The controller instructs the terminal to send 2 data

00100001
Data Bytes: In D0 and D1

0XXXX0X1

The terminal has loaded 2 data into transmission FIFO; the command is executed

01010000
Data Bytes: In D0 to D4

0XXXX0X1
Data Bytes: DC

The controller instructs the terminal to send 5 data (D0-D4)

01010000
Data Bytes: In D0 and D1, register data

0XXXX0X0

The terminal has loaded 5 data into transmission FIFO; the command is executed

RA/RR: REICEIVE-ACCEPTED/RECEIVE-REQUEST

The terminal notifies the controller via a change of state in RR that the data quantity displayed in IL0-IL1 is located in D0-D4. The data shift is acknowledged in the control byte using RA; only then will new data be transmitted by the terminal to the controller.

Example:

Output
Control byte

Input
Status byte

Comment

00000000

0XXXX00X

Start data transmission

0XXX000X

0011X01X

The terminal instructs the controller to accept 3 data from D0-D2

...

...

...

0XXX001X

0011X01X

The controller has accepted data

0XXX001X

0101X00X

The terminal instructs the controller to accept 5 data from D0-D4

...

...

0XXX000X

0101X00X

The controller has accepted data

IR/IA: INIT-REQUEST/INIT-ACCEPTED

If IR is high, the terminal initializes. The send and receive functions are blocked, the FIFO pointers are reset and the interface is initialized with the values from the relevant registers (R32-R35, R18). The completion of the initialization is acknowledged by the terminal using IA.

Example:

Output
Control byte

Input
Status byte

Comment

0XXXXXXX

0XXXXXXX

Start data transmission

00000100

0XXXXXXX

Initialization is requested by the controller

00000100

00000100

The terminal has completed the initialization

00000000

00000100

The controller requests data exchange

00000000

00000000

The terminal is ready

BUF_F: BUFFER-FULL_Flag

The receive FIFO is full. Data received now will be lost.

Error handling

If a parity, framing or overrun error occurs, the corresponding data is lost in transmission and will not be loaded into the receive FIFO of the terminal.
If the buffer is full, incoming data will be ignored.

In the event of an error, the corresponding diagnostic bits are set to R6