Process data mode
Control byte 1 in process data mode
Control byte 1 (CB1) is located in the output image, and is transmitted from the controller to the terminal.
Bit | CB1.7 | CB1.6 | CB1.5 | CB1.4 | CB1.3 | CB1.2 | CB1.1 | CB1.0 |
Name | RegAccess | EnComp | SetOut | ReadLatchN | ReadLatchP | SetCnt | EnMeas | EnLatchC |
Key
Bit | Name | Description | ||
|---|---|---|---|---|
CB1.7 | RegAccess | 0bin | Register communication off (process data mode) | |
CB1.6 | EnComp | 0bin | Compare function for setting and resetting the output not enabled | |
1bin | Compare function for setting and resetting the output enabled | |||
CB1.5 | SetOut | 0bin | sets output manually to 0 V | SetOut only functions if EnComp = 0bin |
1bin | sets output manually to 24 V | |||
CB1.4 | ReadLatchN | 1bin | Read the negative edge | |
CB1.3 | ReadLatchP | 1bin | Read the positive edge | |
CB1.2 | SetCnt | A rising edge at SetCnt will set the counter to the 32 bit value that is written by the controller into the process output data. | ||
CB1.1 | EnMeas | 0bin | Workpiece measurement enabled | If the workpiece measurement is enabled, it is read via CB1.3 and CB1.4 and saved in two latch values. |
1bin | Workpiece measurement not enabled | |||
CB1.0 | EnLatchC | 1bin | The rising edge of the zero input (input C) is active. The counter value is stored in the latch register at the first external latch impulse after the EnLatchC bit becomes true. The subsequent pulses do not have any effect on the latch register. (see note below) | |
 | EnLatchC or EnLatchRise and EnLatchFall? If bit CB1.0 (EnLatchC) is set, bit CB1.3 (EnLatchRise) and bit CB1.4 (EnLatchFall) must not be set, otherwise you cannot know which event has caused a counter value to be stored in the latch. |
Status byte 1 in process data mode
The status byte 1 (SB1) is located in the input image, and is transmitted from terminal to the controller.
Bit | SB1.7 | SB1.6 | SB1.5 | SB1.4 | SB1.3 | SB1.2 | SB1.1 | SB1.0 |
Name | RegAccess | - | StOut | StGate | StLatchC | SetCnt | MeasDone | ValLatchC |
Key
Bit | Name | Description | |
|---|---|---|---|
SB1.7 | RegAccess | 0bin | Acknowledgement for process data mode |
SB1.6 | - | reserved | |
SB1.5 | StOut | 0bin | Status of the output is 0 V |
1bin | Status of the output is 24 V | ||
SB1.4 | StGate | Status of the external gate/latch input | |
SB1.3 | StLatchC | Status of the zero input (input C) | |
SB1.2 | SetCnt | Acknowledgement that the data for setting the counter has been adopted by the terminal. | |
SB1.1 | MeasDone | 1bin | Measurement done |
SB1.0 | ValLatchC | 1bin | A zero-point latch has occurred: a rising edge at the zero input (input C) has caused the current counter value to be stored in the latch register as a reference mark.
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