Process data exchange

Control byte for process data exchange

The control byte is transferred from the controller to the terminal. It can be used

in register mode (REG = 1) or
in process data exchange (REG = 0).

Various actions are triggered in the KL5101 with the control byte:

Bit

Name

REG=0

EN_Latch_Ex_n

Cnt_Set

EN_LAT_EXT /

RD_PERIOD

EN_LATC

Bit	Name	Function
3	En_Latch_Ext_n	The external latch input is activated for the negative edge. The counter value is stored in the latch register with the first external latch pulse after validity of the En_Latch_Ext_n bit. When this bit is set, the subsequent pulses do not have any effect on the latch register. Attention must be paid to ensuring that the corresponding latch valid bit (Latch_Ext_Val) has been removed from the terminal before alerting of the zero pulse. This functionality can be set in the feature register (default setting).
2	Cnt_Set	A rising edge at Cnt_Set will set the counter to the value specified in the process data.
1	En_Latch_Ext	The external latch input is activated for the positive edge. The counter value is stored in the latch register with the first external latch pulse after validity of the En_Latch_Ext bit. When this bit is set, the subsequent pulses do not have any effect on the latch register. Attention must be paid to ensuring that the corresponding latch valid bit (Latch_Ext_Val) has been removed from the terminal before alerting of the zero pulse. This functionality can be set in the feature register (default setting).
1	RD_Period	The periods between two positive edges at input A are measured with a resolution of 200 ns. When the bit is set, this period is output in data bytes D2, D3 and D4. This functionality can be set in the feature register.
0	En_Latch	The zero point latch (C input) is activated. The counter value is stored in the latch register with the first external latch pulse after validity of the En_Latch bit (this has priority over En_Latch_Ext). When this bit is set, the subsequent pulses do not have any effect on the latch register. Attention must be paid to ensuring that the corresponding latch valid bit (Latch_Val) has been removed from the terminal before alerting of the zero pulse. (the Latch_Val bit cannot be removed from the terminal until the C pulse has a low level).

	For the external latch input: Activation of the positive edge (En_Latch_Ext = 1) has priority over activation of the negative edge (En_Latch_Ext_N = 1).

Status byte for process data exchange

The status byte is transmitted from the terminal to the controller. The status byte contains various status bits of the KL5101.

Bit

Name

REG=0

State_Input

Overflow

Underflow

CntSet_Acc

Latch_Ext_Val/

RD_Period_Q

Latch_Val

Bit	Name
5	State_Input	The state of the Status input is mapped in this Bit (adjustable via feature register).
4	Overflow	This bit is set if an overflow (65535 to 0) of the 16-bit counter occurs. It is reset when the counter exceeds a third of the measuring range (21845 to 21846) or as soon as an underflow occurs.
3	Underflow	This bit is set if an underflow (0 to 65535) of the 16-bit counter occurs. It is reset when the counter drops below two thirds of the measuring range (from 43690 to 43689), or immediately an overflow occurs.
2	CntSet_Acc	The data for setting the counter has been accepted by the terminal.
1	Latch_Ext_Val	An external latch pulse has occurred. The data D2, D3 in the process image correspond to the latched value when the bit is set. To reactivate the latch input, En_Latch_Ext must first be removed and then set again.
1	RD_Period_Q	Data bytes 2, 3 and 4 contain the period duration.
0	Latch_Val	A zero point latch has occurred. The data D2, D3 in the process image correspond to the latched value when the bit is set. To reactivate the latch input, En_Latch must first be removed and then set again.