Control and Status Byte IP5209
Process data mode
Control byte
The control byte is transmitted from the controller to the Fieldbus Box. It is located in the output image, and be read or written.
|
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
|
Name |
RegAccess |
RS_FRQ_ERR |
RS_CNT_LAT |
|
|
CNT_SET |
|
EN_LATC |
|
Name |
Description |
|---|---|
|
RegAccess |
0bin: Register communication off (process data mode) |
|
RS_FRQ_ERR |
FRQ_ERR bit in the Status byte is set to zero (as long as the RS_FRQ_ERR is set, no frequency check is performed). |
|
RS_CNT_LAT |
If RS_CNT_LAT and EN_LATC are set, the counter will be set to zero by the rising edge of the Latch (C-input). |
|
CNT_SET |
The counter is set to the values of D0 - D3 by a rising edge at CNT_SET. |
|
EN_LATC |
The reference mark signal (zero point latch R+, R- input) is activated. The current value of the counter is entered into the latch register the first time the signal occurs after EN_LATC has become valid. The data is available in D4 - D7 in the process image. |
Status byte
The status byte is transmitted from the Fieldbus Box to the controller. It is located in the input image, and can only be read.
|
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
|
Name |
RegAccess |
ERROR |
NO_SIGNAL |
|
FRQ_ERR |
CNTSET_ACC |
|
LATC_VAL |
|
Name |
Description |
|---|---|
|
RegAccess |
0bin: Register communication off (process data mode) |
|
ERROR |
General error bit, set if NO_SIGNAL is set |
|
NO_SIGNAL |
This bit is set if no sine-cosine signal is present at the inputs (if the magnitude of the sine-cosine signal is < 0.3V) |
|
FRQ_ERR |
This bit is set when the frequency limit counter in R37 is exceeded. The FRQ_ERR bit can only be reset by the RS_FRQ_ERR bit in the Control byte. |
|
CNTSET_ACC |
The data for setting the counter is accepted from the Fieldbus Box. |
|
LATC_VAL |
A reference signal (zero point latch) has occurred. The data in D4 - D7 in the process image corresponds to the value that has been saved if this function is active (EN_LATC in the CONTROL byte). In order to latch the value again, EN_LATC must first be reset, this reset must then be acknowledged, and after this the bit must be set once more. |
Register communication
Measured values cannot be transmitted during register communication.
Control byte
The control byte is located in the output image, and be read or written.
|
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
|
Name |
RegAccess |
R/W |
Register number | |||||
|
Name |
Description |
|---|---|
|
RegAccess |
1bin: Register communication switched on |
|
R/W |
0bin: Read |
|
Register number |
Number of the register that is to be read or written. |
Status byte
The status byte is located in the input image, and can only be read.
|
Bit |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
|
Name |
RegAccess |
R/W |
Register number | |||||
|
Name |
Description |
|---|---|
|
RegAccess |
1bin: Register communication switched on |
|
R/W |
0bin: Read |
|
Register number |
Number of the register that was read or written. |