Feature Register (R32) IP/IE1502
The module's fundamental settings can be modified in the
feature register. Write protection must first be cancelled in the
code-word register before it is possible to write into this
register. The settings in register 32 are only effective following
a power on reset (the module being switched off and on
again).
Default [0x0104]
|
Bit |
Value |
Description |
Manufacturer’s setting |
|---|---|---|---|
|
0-1 |
0 |
no function |
0 |
|
2 |
0 |
Watchdog is active |
0 |
|
1 |
Watchdog is inactive | ||
|
3 |
0 |
The counter is set as a result of a positive signal in the CNT_SET bit in the control byte |
1 |
|
1 |
The counter is set as a result of a rising edge at the CNT_SET bit in the control byte | ||
|
4 |
0 |
The function for setting the output is inactive |
0 |
|
1 |
The function for setting the output is active | ||
|
5 |
0 |
The function for resetting the output is inactive |
0 |
|
1 |
The function for resetting the output is active | ||
|
6 |
0 |
The function for resetting the counter is inactive |
0 |
|
1 |
The function for resetting the counter is active | ||
|
7 |
0 |
Pulse operating mode is inactive |
0 |
|
1 |
Pulse operating mode is active | ||
|
8 |
0 |
The counter is inhibited when the Gate input is low (0). |
1 |
|
1 |
The counter is inhibited when the Gate input is high (1). | ||
|
9 |
0 |
Timer basis (pulse length register 41) |
0 |
|
1 |
Timer basis (pulse length register 41) | ||
|
10 |
0 |
The output is reset when the counter is reset |
0 |
|
1 |
The output is reset when the pulse time has elapsed | ||
|
11-15 |
0 |
no function |
0 |
Explanation of the watchdog
The watchdog timer is switched on by default. The output is reset
if the watchdog overflows (> 100 ms).