Functioning IP/IE1502
The Ix1502 input module counts binary pulses, and transmits the
current value to the higher level controller. Two fully
independent, 32 bit, gated up/down counters are available. A low
level or a high level at the GATE input halts the associated
counter, depending on the setting in the feature register
(Feature.8) for the channel. The counting direction can be
controlled through separate inputs (low level = up, high level =
down). Two digital outputs can also be set.
The maximum input frequency is limited to 100 kHz, the minimum
pulse width for the input signal being about one microsecond. The
counters react to a rising edge of the input signal.
The controller can use the control byte (CB) to set the counter
state (CB.5), inhibit the module's counting function (CB.4) and
to activate the outputs (CB.2). An internal function can also be
activated (CB.0) permitting the outputs to be set automatically at
defined counter states. The bit R32.2 in the feature register can
also be used to determine whether counter setting is edge triggered
or level triggered.
Internal Functions
Setting/resetting the outputs and resetting the counter
When the internal function is active (Control Byte, Bit 0) the outputs are set or reset, according to the settings in the feature register (R32.4 - R32.6) and the pre-set values in registers 35 - 38. This takes away the function of the bit (Control Byte, Bit 2) for setting the outputs. Registers 39 and 40 contain the values at which the counter will be reset to zero; this function is only activated by the associated bit R32.6 in the feature register, and is independent of the control byte.
Note The setting/resetting functions are only active in the up-counting modus! On Startup of the module, the register data from the EEPROM will be transfered to the RAM. If the values have to be changed during the run time, the new values have to be written into the RAM area (R0 - R5). |
Pulse operation
If the pulse operating mode is active (R32.7 and CB.0) the associated output is set, according to the values in registers 35 and 36, for a specified pulse period (set in register 41, unit: 1µs/digit or 64 µs/digit (timer factor, Bit R32.9), shortest pulse: 250 µs, maximum pulse 4s). This means that bit R32.4 and R32.5 of the Feature Register do not have any function. The counters are reset in an identical fashion. Bit R32.10 of the feature register has influence on the way the outputs are switched off, namely whether the output is reset when the counter is reset, or not until after the pulse time has elapsed. The pre-set values in registers 35 - 41 are copied into registers 0 - 5 following a power on reset (see register table). They can be modified during operation. After the feature register, or other register values located in EEPROM, have been modified, a power on reset must follow so that these values are adopted.
Process Data
In the Ix1502 module, 5 bytes (4 bytes of user data and 1 control/status byte) are mapped. If no process data is exchanged within 100 ms (activated via bit R32.3 of Feature-Register), a watchdog switches the outputs off.
Conceptual circuit diagram
