Control word
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Name | OL7 | OL6 | OL5 | OL4 | OL3 | OL2 | OL1 | OL0 | - | - | - | - | SC | IR | RA | TR |
Bit no. | Name | Description | |
---|---|---|---|
15 .. 8 | OL7…OL0 | 1dec…22dec | The number of output bytes available for the transmission from the controller to the box. Note: If you have set the size of the send data to 50 x 1 word, the output variables “Data Out n” have the data type “Word”. A Word has a size of two bytes. |
7 .. 4 |
reserved | ||
3 |
SC |
rise |
Continuous sending of data from the FIFO. The send buffer is filled (up to 128 bytes) by the controller. The buffer content is sent with rising edge of bit SC. Once the data has been transferred, this is acknowledged by the box to the controller by setting the SW.2 bit. SW.2 is cancelled with CW.3. |
2 |
IR |
1bin |
The controller requests the box to initialize. The send and receive functions are blocked, the FIFO pointers are reset, and the interface is initialized with the values of the responsible objects (baud rate 4073, data frame 4074, feature bits 4075). The execution of the initialization is acknowledged by the box with the SW.2 (IA) bit. |
0bin |
The controller once again requests the box to prepare for serial data exchange. | ||
1 |
RA |
toggle |
The controller acknowledges receipt of data by changing the state of this bit. Only then can new data be transferred from the box to the controller. |
0 |
TR |
toggle |
Via a change of state of this bit the controller notifies the box that the DataOut bytes contain the number of bytes indicated via the OL bits. The box acknowledges receipt of the data in the status byte by changing the state of the SW.0 (TA) bit. Only then can new data be transferred from the controller to the box. |