Synchronization
In the EL 6731, the DP cycle is synchronized with the EtherCAT cycle. Synchronization takes place by default via the Sync Manager 2 event or, if there is no EtherCAT output process data, via the Sync Manager 3 event. Alternatively, the EL6731 can also be operated in the Distributed Clocks mode, in which case synchronization takes place via the SNYC0 or SYNC1 events.
SM-synchronous
The illustration below shows the sequence of the DP cycle if no Distributed Clocks are used.
When receiving the EtherCAT process data telegram, the SM2 event (SM3 if no EtherCAT output data are configured, i.e. only DP slaves without DP outputs) is generated by the EtherCAT slave controller, thus starting the DP cycle. A data exchange telegram with the output process data received over EtherCAT is thereby sent for each configured DP Slave (that is in the data exchange state). The sequence corresponds to the sequence of the configuration, i.e. it starts with the DP slave configured in the objects 0x800z. Once all configured DP slaves have been dealt with, the EtherCAT input data is updated and the DP cycle is finished. If the next SM2 (SM3) event is received before the DP cycle is completed, the Cycle Exceed counter (0x1C32:0B or 0x1C33:0B) is incremented and one DP cycle is skipped.
SYNC0-synchronous
The DP cycle is started by the SM2 (SM3) event. The sending of the first telegram is delayed until the SYNC0 event occurs, so that the sending of the Global Control telegram takes place with a jitter of maximum 500 ns. The remainder of the DP cycle sequence corresponds to that in the case of synchronization without Distributed Clocks.
Transmission of the process data with LRW telegram (Separate Input Update = FALSE)
The illustration below shows the sequence of the DP cycle and the meaning of the Sync Manager parameters if the DP cycle is controlled with Distributed Clocks via SM and SYNC0 event.
Transmission of the output data with LWR telegram and the input data with LRD telegram (Separate Input Update = TRUE, Task Cycle Time = Base Time)
If EtherCAT outputs and inputs are transmitted with separate telegrams, so that the inputs are as up to date as possible (click on Separate Input Update for the associated TwinCAT task in the TwinCAT System Manager), there is less room for the DP cycle. If the Task Cycle Time (= EtherCAT Master Cycle Time) is equal to the TwinCAT Realtime Base Time, the LRD telegram, with which the inputs are read in as late as possible, is sent in accordance with the set CPU limit.
Transmission of the output data with LWR telegram and the input data with LRD telegram (Separate Input Update = TRUE, Task Cycle Time = 4*Base Time, pre-ticks = 1)
If the Task Cycle Time (= EtherCAT Master Cycle Time) is larger than the TwinCAT Realtime Base Time, then the LRD telegram is sent at a previous Base Time in accordance with the set pre-tick.
SYNC1-synchronous
The DP cycle is started through the SYNC0 event. Before the first telegram is sent, the system waits for the SYNC1 event, so that the global control telegram is sent with a maximum jitter of 500 ns. The remainder of the DP cycle sequence corresponds to that in the case of synchronization without Distributed Clocks.
The same settings for Separate Input Update apply as in the case of synchronization with SYNC0, therefore only the case without Separate Input Update is illustrated here:
