Configuration data
Index 80p0 FB Settings (for Ch.1, p = 0; Ch.2, p = 1)
Index (hex) | Name | Meaning | Data type | Flags | Default |
---|---|---|---|---|---|
80p0:0 | FB Settings | Max. subindex | UINT8 | RO | 0x11 (17dec) |
80p0:01 | Invert feedback direction | TRUE: Negates the 64-bit position value | BOOLEAN | RW | FALSE |
80p0:11 | Device type | 03: BiSS | UINT32 | RW | 0x00000003 (2dec) |
Index 80p8 FB BiSS-C settings (for Ch.1, p = 0; Ch.2, p = 1)
Index (hex) | Name | Meaning | Data type | Flags | Default |
---|---|---|---|---|---|
80p8:0 | FB BiSS-C settings | Max. subindex | UINT8 | RO | 0x18 (24dec) |
80p8:01 | Invert feedback direction | FALSE: 64-bit position value TRUE: Negates the 64-bit position value | BOOLEAN | RW | FALSE |
0x80p8:02 | Disable Status Bits | FALSE: status bits enabled TRUE: status bits disabled | BOOLEAN | RW | FALSE |
0x80p8:03 | CRC Invert | FALSE: CRC invert deactivated TRUE: CRC is transferred invert | BOOLEAN | RW | TRUE |
0x80p8:11 | CRC Polynomial | Counter polynomial for CRC determination 0: Transmission is not CRC-secured (slave specific) | UINT32 | RW | 0x00000043 (67dec) |
0x80p8:12 | Supply Voltage | Encoder supply voltage: 50: 5.0 V 90: 9.0 V (see note below) | UINT8 | RW | 5.0V (50) |
0x80p8:13 | Clock Frequency | 0: 10 MHz 2: 3.33 MHz 3: 2.5 MHz 17: 500 kHz 19: 250 kHz | UINT8 | RW | 0x00 (0dec) |
0x80p8:14 | Coding | 0: Dual code active | UINT8 | RW | 0x00 (0dec) |
0x80p8:15 | Multiturn [Bit] | Number of multiturn bits | UINT8 | RW | 0x0C (12dec) |
0x80p8:16 | Singleturn [Bit] | Number of singleturn bits | UINT8 | RW | 0x0D (13dec) |
0x80p8:17 | Offset LSB Bit [Bit] | Number of “right aligned” Offset bits | UINT8 | RW | 0x00 (0dec) |
0x80p8:18 | Mode | 0: BiSS-C mode 1: SSI mode | UINT8 | RW | 0x00 (0dec) |
Notice | |
Possible impairment of devices! If the object 0x80n8:11 “CRC polynomial” is set to “0”, the data transmission is not CRC secured anymore. Therefore wrong counter values may not be detected by the encoder! |
Setting the encoder supply voltage
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