Time-related cooperation with other terminals

The process data output of the DAC (digital/analog converter) in the EL47xx is triggered by an interrupt, which is generated by the local clock in the terminal. All local clocks in the supporting EtherCAT slaves are synchronized. This enables EtherCAT slaves (here: terminals) to sample measured values and output values simultaneously (simultaneous interrupt generation), independent of the distance between them. This simultaneity is within the distributed clock precision range of < 100 ns.

Sample:

Matching between two EL4732:

The EtherCAT master, e.g. Beckhoff TwinCAT, configures both EL4732 such that their SYNC1 signals occur at the same time. Assumption: The EtherCAT bus cycle time is 500 µs. SYNC1 is therefore triggered every 500 µs in all EL4732. If both terminals operate with a corresponding oversampling factor (e.g. 20), the SYNC0 pulse correlating to SYNC1 will occur simultaneously in all EL4732, in this example every 25 µs.

If the EL4732 use different oversampling factors, their SYNC0 pulses no longer occur simultaneously. The higher-level SYNC1 pulse is retained.

If a value is entered under "Shift time (µs)" in the TwinCAT System Manager (DC tab, Advanced Settings) for the SYNC0 pulse in an EL4732, the EL4732 manipulated in this way will start output sooner or later, according to the set value.

Sample:

An EL3702 oversampling input terminal scans an analog signal on 1 channel with an oversampling factor of n = 100 and a bus cycle time of 1 ms. The sample resolution is therefore 10 µs. This signal should be output accordingly on a EL4732 with same settings. Sample output in the EL4732 should be delayed by an exactly defined interval. Please note:

The EL4732 belongs to the output slave group and therefore features the standard shift time in the SYNC1 pulse (see Beckhoff System Manager --> EtherCAT device --> EtherCAT tab --> Advanced Settings --> Distributed Clocks --> Shift Time).
The EL3702 belongs to the input terminal group and therefore features a slightly earlier SYNC1 pulse. This forward shift depends on several parameters. See “Distributed clock system description”. Setting also under Beckhoff System Manager --> EtherCAT device --> EtherCAT tab --> Advanced Settings --> Distributed Clocks --> Shift Time.
"Input Shift Time" settings affect all input terminals.
In addition, the shift time for the affected EL4732 (and the EL3702) can be modified via the System Manager ("DC" tab, "Advanced Settings", "SYNC0", "User Defined"). If an additional shift time of 5 µs is entered manually for the SYNC0 pulse for this terminal, each output is delayed by 5 µs relative to all other (globally set) output terminals.

	Synchronization and provision of process data The SYNC1 pulse is derived from the SYNC0 pulse. Please note that this may influence the timing of the process data allocation for the EtherCAT frame, since this is controlled by the SYNC1 pulse.

The application of these functions using the Beckhoff TwinCAT System Manager is described in section Process data and configuration.

	SYNC0 and SYNC1 pulse with several EtherCAT slaves This approach of matching the SYNC0 and SYNC1 pulses of several EtherCAT slaves is not limited to EL4732. All EtherCAT slaves supporting the distributed clock function can be correlated relatively freely in this way.

CAUTION

CAUTION! Risk of device damage!

The above notes and information should be used advisedly.
The EtherCAT master automatically allocates SYNC0 and SYNC1 settings that support reliable and timely process data acquisition.
User intervention at this point may lead to undesired behavior.
If these settings are changed in the System Manager, no plausibility checks are carried out on the software side. Correct function of the terminal with all conceivable setting options cannot be guaranteed.