Distributed Clocks (DC)

EtherCAT and Distributed Clocks A basic introduction into EtherCAT and distributed clocks is available for download from the Beckhoff website: the “Distributed clocks system description”.

The EL1502 device supports the distributed clocks function. In order for the EL1502 to be able to make the current counter value available in the designated process data in time before the arrival of the querying EtherCAT datagram, a suitable signal must be generated cyclically within the terminal. This signal can be triggered in the EL1502 through two events: the SyncManager (SM) and the distributed clock (DC). Under operating mode selection the following options are available (see Fig. "DC" (Disributed Clocks) tab):

• SM Synchronous
  The SynManager event occurs when an EtherCAT frame successfully exchanges process data with the EL1502. Frame-triggered, the current counter value is thus cyclically determined, but with the low temporal jitter of the Ethernet frame.
• DC-synchronous
  In DC operating mode determination of the counter value is triggered cyclically at constant intervals through the integrated DC unit, synchronous with the bus cycle as standard. More uniform polling offers higher-quality position data for a higher-level control algorithm, for example. In the EL1502 the SYNC0 signal acts as trigger.

When DC Synchronous operating mode is activated TwinCAT selects settings that ensure reliable operation of the EL1502 with current position data. This means that determination of the current counter value is triggered by the SYNC0 signal at highly constant intervals and in good time (i.e. with an adequate safety buffer) before retrieving EtherCAT datagram is started.

If necessary, the SYNC0 signal can be shifted along the time axis to the right/later or left/earlier in associated dialogs by specifying a “User defined Shift Time”, see Fig. Advanced Distributed Clock (DC) settings, EL1502 terminal.

• A right-shift (positive shift value) will delay the counter value query, which means the position value becomes more current from the PLC perspective. However, this increases the risk that the position determination may not be finished in time before the arrival of EtherCAT frame, so that no current position value is available in this cycle.
• A left-shift (negative shift value) means the counter value will be queried earlier, resulting in older position values, with an associated increase in the safety buffer before the arrival of the EtherCAT datagram. This setting may be useful in systems with high real-time jitter, if no Industrial PCs from Beckhoff are used for control purposes, for example.

CAUTION

CAUTION! Risk of device damage!

The mentioned notes and information should be used advisedly. The EtherCAT master automatically allocates SYNC0 and SYNC1 settings that support reliable and timely process data acquisition.
User intervention at this point may lead to undesired behavior.
If these settings are changed in the System Manager, no plausibility checks are carried out on the software side.
Correct function of the terminal with all conceivable setting options cannot be guaranteed.

Default setting

The cyclic read of the inputs is triggered by the SYNC0 pulse (interrupt) from the DC in the EL1502. The EtherCAT master sets the Sync Unit Cycle time value to the PLC cycle time and therefore the EtherCAT cycle time as standard. See Fig. Advanced Distributed Clock (DC) settings, EL1502 terminal: 4000µs = 4 ms, as TwinCAT is in configuration mode.

DC settings for EL1502

• SYNC0
  Sync unit cycle: a multiple of the bus cycle time. The counter value is periodically determined at this interval (in µs).
• User-defined
  Arbitrary number up to 2³² ns ≈ 4.3 secs. Decimal point values are possible.
• Shift Time
  The Shift Time can be used to shift the SYNC0 pulse for this EL1502 relative to other terminals and the global SYNC pulse in nanosecond steps. If the inputs of multiple EL1502 terminals are to be read at the same time, the same value must be entered here.
• Based on input reference
  If this option is activated an additional Input Shift is added to the configurable terminal-specific SYNC0 shift (user-defined). This value is calculated and made available by the EtherCAT master (SysMan/Device EtherCAT/tab EtherCAT/Advanced Settings/Distributed Clocks/Input Shift Time/, see Fig. Activation of PDOs 0x1600, 0x1601 and 0x1A00, 0x1A01- index 0x8000:04 for setting the counting direction). As a result, all the input terminals in the system (EL1xxx, EL3xxx) read their inputs as close as possible to the time of the EtherCAT frame that will fetch them, thereby supplying the most recent possible input data to the controller.
• Enable SYNC0
  Automatically activated in DC Synchronous operating mode.
• SYNC1
  Additional SYNC pulse, derived from SYNC0 or from the DC itself. Not required by the EL1502.

DC settings for EtherCAT master

Higher-level distributed clock parameters can be modified under advanced settings for the EtherCAT master. Refer also to the basic introduction to the topic of EtherCAT and Distributed Clocks; download: the “Distributed clocks system description”.