Overview

New machines and plants are becoming ever more complex and must be realized cost-effectively under considerable deadline pressure. Beyond that, the control software portion is continuously increasing, among other things due to the demand for flexibility with regard to the products that can be produced on a plant. A reduction of the engineering expenditure for the generation of the control code as well as the commissioning of this code in the actual plant thus promises a clear economic benefit. One of the methods aimed at achieving this is called “virtual commissioning”. The objective is to test and optimize the generated control code at an early stage of the engineering, even without any real existing hardware, so that the actual commissioning can proceed much faster.

The TE1111 TwinCAT EtherCAT Simulation function has been created in order to fulfill these requirements. If, in addition, models of the machine/plant are already available in Matlab Simulink or a simulation tool that offers FMU (code) export, it is possible to perform HIL (Hardware-In-the-Loop) simulations together with the TE1400 Target for Matlab®/Simulink® or TE1420 Target for FMI functions with manageable effort.

The TE1111 TwinCAT EtherCAT Simulation function simulates an EtherCAT segment. An already created I/O configuration of the real plant is exported and can be imported into a second system as an ‘EtherCAT Simulation’ device. A mirrored process image is thus available on this system that can be linked with corresponding TwinCAT modules (e.g. written in the IEC 61131-3 languages or generated from Matlab®/Simulink®). The desired behavior of the machine must be implemented with sufficient accuracy in these modules. If the TwinCAT real-time is now started on both systems, one has an HIL simulation without having to adapt the original project in order to achieve this.

Overview 1:

Since the project for the control system to be tested should not be changed, the EtherCAT Simulation Device operates unsynchronized. This means that the task that drives the Simulation Device has to run twice as fast on account of Shannon’s theorem (sampling theorem). On standard IPC hardware the shortest cycle time of the simulation device is currently 50µs. HIL simulations of the control system to be tested are thus possible with a cycle time of 100µs.

Features supported:

Basic functionality