KL6031, KL6041 - Serial interface terminals

Mapping

The Bus Terminals occupy addresses within the process image of the controller. The assignment of process data (input and output data) and parameterization data (control and status bytes) to the control addresses is called mapping. The type of mapping depends on:

the fieldbus system used
the terminal type
the parameterization of the Bus Coupler (conditions), such as
- compact or complex evaluation
- Intel or Motorola format
- word alignment activated or deactivated

The Bus Couplers (BKxxxx, LCxxxx) and Bus Terminal Controllers (BCxxxx, BXxxxx) are supplied with certain default settings. The default setting can be changed with the KS2000 configuration software or with a master configuration software (e.g. TwinCAT System Manager or ComProfibus).

The following tables show the mapping depending on different conditions.

 

Complex evaluation

In the case of complex evaluation, the serial interface terminals occupy addresses in the input and output process image. Control and Status words can be accessed.

 
 

22-byte process image

Complex evaluation in Intel format

 
 
Address
Input data
Output data
Conditions
Word offset
High byte
Low byte
High byte
Low byte
Complex evaluation: yes
Motorola format: no
Word alignment: any
0
SW
CW
1
DataIn 1
DataIn 0
DataOut 1
DataOut 0
2
DataIn 3
DataIn 2
DataOut 3
DataOut 2
3
DataIn 5
DataIn 4
DataOut 5
DataOut 4
4
DataIn 7
DataIn 6
DataOut 7
DataOut 6
5
DataIn 9
DataIn 8
DataOut 9
DataOut 8
6
DataIn 11
DataIn 10
DataOut 11
DataOut 10
7
DataIn 13
DataIn 12
DataOut 13
DataOut 12
8
DataIn 15
DataIn 14
DataOut 15
DataOut 14
9
DataIn 17
DataIn 16
DataOut 17
DataOut 16
10
DataIn 19
DataIn 18
DataOut 19
DataOut 18
11
DataIn 21
DataIn 20
DataOut 21
DataOut 20

Complex evaluation in Motorola format

 
 
Address
Input data
Output data
Conditions
Word offset
High byte
Low byte
High byte
Low byte
Complex evaluation: yes
Motorola format: yes
Word alignment: any
0
SW
CW
1
DataIn 0
DataIn 1
DataOut 0
DataOut 1
2
DataIn 2
DataIn 3
DataOut 2
DataOut 3
3
DataIn 4
DataIn 5
DataOut 4
DataOut 5
4
DataIn 6
DataIn 7
DataOut 6
DataOut 7
5
DataIn 8
DataIn 9
DataOut 8
DataOut 9
6
DataIn 10
DataIn 11
DataOut 10
DataOut 11
7
DataIn 12
DataIn 13
DataOut 12
DataOut 13
8
DataIn 14
DataIn 15
DataOut 14
DataOut 15
9
DataIn 16
DataIn 17
DataOut 16
DataOut 17
10
DataIn 18
DataIn 19
DataOut 18
DataOut 19
11
DataIn 20
DataIn 21
DataOut 20
DataOut 21
 
 

5-byte process image

Complex evaluation in Intel format without word alignment

 
 
Address
Input data
Output data
Conditions
Word offset
High byte
Low byte
High byte
Low byte
Complex evaluation: yes
Motorola format: no
Word alignment: no
0
DataIn 0
SB
DataOut 0
CB
1
DataIn 2
DataIn 1
DataOut 2
DataOut 1
2
DataIn 4
DataIn 3
DataOut 4
DataOut 3
3
reserved
DataIn 5
reserved
DataOut 5

Complex evaluation in Intel format with word alignment

 
 
Address
Input data
Output data
Conditions
Word offset
High byte
Low byte
High byte
Low byte
Complex evaluation: yes
Motorola format: no
Word alignment: yes
0
reserved
SB
reserved
CB
1
DataIn 1
DataIn 0
DataOut 1
DataOut 0
2
DataIn 3
DataIn 2
DataOut 3
DataOut 2
3
DataIn 5
DataIn 4
reserved
DataOut 4

Complex evaluation in Motorola format without word alignment

 
 
Address
Input data
Output data
Conditions
Word offset
High byte
Low byte
High byte
Low byte
Complex evaluation: yes
Motorola format: yes
Word alignment: no
0
DataIn 1
SB
DataOut 1
CB
1
DataIn 3
DataIn 0
DataOut 3
DataOut 0
2
DataIn 5
DataIn 2
DataOut 5
DataOut 2
3
reserved
DataIn 4
reserved
DataOut 4

Complex evaluation in Motorola format with word alignment

 
 
Address
Input data
Output data
Conditions
Word offset
High byte
Low byte
High byte
Low byte
Complex evaluation: yes
Motorola format: yes
Word alignment: yes
0
reserved
SB
reserved
CB
1
DataIn 0
DataIn 1
DataOut 0
DataOut 1
2
DataIn 2
DataIn 3
DataOut 2
DataOut 3
3
DataIn 4
DataIn 5
DataOut 4
DataOut 5
 
 

3-byte process image

Complex evaluation in Intel format without word alignment

 
 
Address
Input data
Output data
Conditions
Word offset
High byte
Low byte
High byte
Low byte
Complex evaluation: yes
Motorola format: no
Word alignment: no
0
DataIn 0
SB
DataOut 0
CB
1
DataIn 2
DataIn 1
DataOut 2
DataOut 1

Complex evaluation in Intel format with word alignment

 
 
Address
Input data
Output data
Conditions
Word offset
High byte
Low byte
High byte
Low byte
Complex evaluation: yes
Motorola format: no
Word alignment: yes
0
reserved
SB
reserved
CB
1
DataIn 1
DataIn 0
DataOut 1
DataOut 0
2
reserved
DataIn 2
reserved
DataOut 2

Complex evaluation in Motorola format without word alignment

 
 
Address
Input data
Output data
Conditions
Word offset
High byte
Low byte
High byte
Low byte
Complex evaluation: yes
Motorola format: yes
Word alignment: no
0
DataIn 1
SB
DataOut 1
CB
1
DataIn 2
DataIn 0
DataOut 2
DataOut 0

Complex evaluation in Motorola format with word alignment

 
 
Address
Input data
Output data
Conditions
Word offset
High byte
Low byte
High byte
Low byte
Complex evaluation: yes
Motorola format: yes
Word alignment: yes
0
reserved
SB
reserved
CB
1
DataIn 0
DataIn 1
DataOut 0
DataOut 1
2
DataIn 2
reserved
DataOut 2
reserved
 
 

Compact evaluation

 
Operation with a compact process image is not possible
Operation of the KL6031 / KL6041 with a compact process image (without Control and Status bytes) is not possible, because Control and Status bytes are required for meaningful process data mode of the KL6031 / KL6041. Even if you set your Bus Coupler to the compact process image, the KL6031 / KL6041 will still be represented with a complete process image!
 
 

Key

Complex evaluation: In addition to the process data, the control and status bytes are also mapped into the address space.
Motorola format: Motorola or Intel format can be set.
Word alignment: In order for the channel address range to commence at a word boundary, empty bytes are inserted into the process image as appropriate.
SB / SW: Status byte / Status word for channel n (appears in the input process image)
CB / CW: Control byte for channel n (appears in the output process image)
reserved: This byte is assigned to the process data memory, although it has no function.