KL2521-xxxx - One Channel Pulse Train Output Terminals, RS422 / 24 V DC

Register overview

 

These registers exist once for each channel

Address
Name
Default value
R/W
Storage medium
Target counter value (low word)
0x0000 (0dec)
R/W
RAM
Target counter value (high word)
0x0000 (0dec)
R/W
RAM
Maximum frequency
0x0000 (0dec)
R/W
RAM
Counter extension (high word)
0x0000 (0dec)
R
RAM
R4…R6
reserved
0x0000 (0dec)
R
 
Command register - reserved
0x0000 (0dec)
R/W
RAM
Terminal type
0x09D9 (2521dec)
R
ROM
Software version number
0x3446 (4FASCI)
R
ROM
Multiplex shift register
0x0118 (280dec)
R
ROM
Signal channels
0x0118 (280dec)
R
ROM
Minimum data length
0x1818 (6468dec)
R
ROM
Data structure
0x0004 (4dec)
R
ROM
R14
reserved
0x0000 (0dec)
R
 
Alignment register
variable
R/W
RAM
Hardware version number
0x0003 (3dec)
R/W
EEPROM
R17…R30
reserved
0x0000 (0dec)
R/W
 
Code word register
variable
R/W
RAM
Feature register
0x0030 (48dec)
R/W
EEPROM
R33… R34
reserved
0x0000 (0dec)
R/W
 
User switch-on value
0x0000 (0dec)
R/W
EEPROM
Base frequency 1 (low word)
0xC350 (50000dec)
R/W
EEPROM
Base frequency 1 (high word)
0x0000 (0dec)
R/W
EEPROM
Base frequency 2 (low word)
0x86A0 (34464dec)
R/W
EEPROM
Base frequency 2 (high word)
0x0001 (1dec)
R/W
EEPROM
Ramp time constant (rising, see feature register)
0x03E8 (1000dec)
R/W
EEPROM
Ramp time constant (falling, see feature register)
0x03E8 (1000dec)
R/W
EEPROM
Frequency factor (direct input, digit x 10 mHz)
0x0064 (100dec)
R/W
SEEROM
Run-out frequency (travel distance control)
0x0032 (50dec)
R/W
SEEROM
R44… R61
reserved
0x0000 (0dec)
R/W
 

*) The change of the base frequency requires a reset for activation.