KL2521-xxxx - One Channel Pulse Train Output Terminals, RS422 / 24 V DC

Process data

 

Input format:

Two's complement representation (integer-1 equals 0xFFFF) or
Signed amount representation (Feature.3) (integer - 1 equals 0x8001)

The output frequency is specified within maximum resolution of 15 bits (the 16th bit is used to specify the direction).
Negative process data results in rotation in the opposite direction. In this case, the internal counter counts to decreasing values.

 
 

Relative data

The output frequency is based on the base frequency that is set in registers 36 – 39 and the process data (see table).

Output frequency = base frequency x process data / 32767
Highest resolution = 125 mHz

Example:
Base frequency = 100,000 Hz (maximum selected output frequency)
Process data = 0x00FF (255dec)
Output frequency = 778.22 Hz

Process data
Output value
 
0x0000 (0dec)
0% DC
0x3FFF (16383dec)
50% of the base frequency, rotation to the right
0x7FFF (32767dec)
100% of the base frequency, rotation to the right
Two's complement
0xC000 (-16384dec)
50% of the base frequency, rotation to the left
0x8000 (-32768dec)
100% of the base frequency, rotation to the left
Signed amount representation
0xBFFF (-16383dec)
50% of the base frequency, rotation to the left
0xFFFF (-32767dec)
100% of the base frequency, rotation to the left
 
 

Direct data

It is possible to enter the frequency directly (Feature.7). In this case the process data is multiplied by the factor contained in register 42, and directly written to the synthesis chip.

Output frequency = frequency factor x process data x 10 mHz
Highest resolution = 10 mHz

Example:
Frequency factor = 100
Process data = 0x00FF (255dec)
Output frequency = 255 Hz